The invention relates to a logarithmic amplifier comprising a plurality of limiting amplifier stages which successively perform their limiting actions in response to an increase of an input signal applied to an input terminal of the logarithmic amplifier, and whose signal outputs are coupled to an adder circuit for supplying an output signal which varies substantially logarithmically as a function of the input signal.
Logarithmic amplifiers of this type in which the outputs of the amplifier stages are coupled either directly or via respective demodulation circuits to the adder circuit are known, for example, from the Article "A True Logarithmic Amplifier for RADAR IF Applications", IEEE, Journal of Solid State Circuits, Vol. SC-15, No. 3, June 1980, pp. 291-295 or from the journal Frequenz, Vol. 39, No. 12, December 1985, pp. 320-324. Such logarithmic amplifiers are used, inter alia, for amplifying signals having a large dynamic range in which compression of large signal amplitudes is desired as, for example, in radar applications or in radiation detectors. Such logarithmic amplifiers may also be used advantageously in amplifiers for AM-modulated signals, example, of radio or TV receivers.
The logarithmic range of such logarithmic amplifiers is approximately equal to the product of the gain per amplifier stage and the number of amplifier stages. The gain per stage should be chosen comparatively low (for example, 12 db) in order to ensure a sufficiently correct logarithmic variation. The logarithmic range can thus be increased by incorporating more amplifier stages in cascade.